1. Field of the Invention
The present invention relates to a preferable mounting method for face-up mounting of an electronic element such as a semiconductor chip on a wiring board and a preferable mounting structure therefor.
Priority is claimed on Japanese Patent Application No. 2004-331965 filed on Nov. 16, 2004, the content of which is incorporated herein by reference.
2. Description of Related Art
In recent years, in electronic instruments having portability and/or mobility such as, mainly, mobile telephones, notebook type personal computers, PDAs (personal data assistants), etc., downsizing of various types of electronic components (electronic elements) such as internally incorporated semiconductor chips has been attempted in order to miniaturize and lower the weight of the device.
Therefore, for example, in a semiconductor chip, packaging methods have been devised, and at present, ultra-small packaging or so-called CSPs (chip scale packages) have been provided.
In semiconductor chips produced using CSP technology, it is sufficient that the mounting area be equivalent to the area of the semiconductor chip, wherein high-density mounting has been achieved (for example, refer to Japanese Published Unexamined Patent Application, First Publication No. 2000-216330).
Such a semiconductor chip is mounted on a board (wiring board) having a wiring pattern for relocation formed thereon, and is incorporated in an electronic device. As a method for mounting a semiconductor chip, a face-down mounting has been known, in which the active surface of a semiconductor chip is mounted so as to be turned to the substrate side. However, in face-down mounting, it is necessary to prepare an exclusive substrate for an electrode structure of the semiconductor chip, resulting in an increase in cost. In addition, unnecessary processing such as formation of a bump electrode for connection is required. On the other hand, in face-up mounting in which a semiconductor chip is mounted with the active surface thereof facing upward, it is necessary to connect electrode terminals of the semiconductor chip with a wiring pattern of the wiring board one by one by wire bonding, wherein when the number of terminals is increased, it becomes difficult to cope therewith. Further, since there is a limit in the length of wiring in the case of wire bonding, a universal substrate cannot be used. Still further, there may be a case where a defect is caused due to mechanical stress when carrying out wire bonding.